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Apple A4
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Apple A4 : ウィキペディア英語版
Apple A4

The Apple A4 is a 32-bit package on package (PoP) system-on-a-chip (SoC) designed by Apple Inc. and manufactured by Samsung. It combines an ARM Cortex-A8 CPU with a PowerVR GPU, and emphasizes power efficiency. The chip commercially debuted with the release of Apple's iPad tablet; followed shortly by the iPhone 4 smartphone,〔 the iPod Touch (4th generation), and the Apple TV (2nd generation). It was superseded by the Apple A5 processor used in the iPad 2 released the following year, which was then subsequently replaced by the Apple A5X processor in the iPad (3rd generation).
== Design ==
Apple A4 is based on the ARM processor architecture. The first version released runs at 1 GHz for the iPad and contains an ARM Cortex-A8 CPU core paired with a PowerVR SGX 535 graphics processor (GPU)〔 built on Samsung's 45 nm silicon chip fabrication process. The clock speed for the units used in the iPhone 4 and iPod Touch (4th generation) is 800 MHz, but the clock speed for the unit used in the Apple TV has not been released.
The Cortex-A8 core used in the A4 is thought to use performance enhancements developed by chip designer Intrinsity (which was subsequently acquired by Apple) in collaboration with Samsung. The resulting core, dubbed "Hummingbird", is able to run at far higher clock rates than other implementations while remaining fully compatible with the Cortex-A8 design provided by ARM. Other performance improvements include additional L2 cache. The same Cortex-A8 CPU core used in the A4 is also used in Samsung's S5PC110A01 SoC.
The A4 processor package does not contain RAM, but supports PoP installation. The top package of the A4 used in the iPad, in the iPod Touch 4th gen and in the Apple TV 2nd gen contains two low-power 128 MB DDR SDRAM chips for a total of 256 MB RAM. For the iPhone 4 there are two chips of 256 MB for a total of 512 MB.〔(【引用サイトリンク】title=A Peek Inside Apple’s A4 Processor )〕 RAM is connected to the processor using ARM's 64-bit-wide AMBA 3 AXI bus. This is twice the width of the memory buses of the SoCs used by the contemporary Apple iPhone and iPod touch, supporting the greater need for graphics bandwidth in the iPad.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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